The present invention relates to the manufacture of semiconductor integrated circuits and, in particular, to a method of forming a reliable ohmic contact to a polysilicon filled trench isolation region in a single poly bipolar or bi-CMOS process.
Deep trench isolation is used in many bipolar and bi-CMOS process technologies. As shown in FIG. 1, this isolation technique utilizes a deep trench 10 etched into a silicon substrate 12 that is lined with thin silicon oxide 14 and then filled with undoped polysilicon 16. The poly filled trench is then capped with field oxide 18. For the typical application of isolation, the undoped polysilicon fill 16 is left electrically floating by interposing dielectric material 20 between the poly fill 16 and the overlying metal interconnect structure 22 of the integrated circuit.
There may be applications in which a contact to the undoped polysilicon fill region 16 of the isolation structure is desirable As shown in FIG. 2, the simplest way to form this contact is to cut a via in the dielectric material 20 and form a metal contact 22 down to the polysilicon fill 16. Those skilled in the art will appreciate that, depending on the topology of the device structure, the contact 22a may be formed as part of the formation of the metal layer 22 itself or as separate plug, e.g. tungsten, prior to formation of the metal layer 22.
However, the formation of the contact 22a may present several problems. For example, the metal contact 22a may form a schottky diode with the undoped polysilicon fill region 16, rather than the desired ohmic contact. Also, the contact could be made on an active (non-field) region and this would not be compatible with modern silicided processes in that the silicide from the active region could short across the oxide liner to the exposed trench fill.
In an embodiment of a method of fabricating an isolation structure in a semiconductor integrated circuit in accordance with the present invention, a trench is formed in a semiconductor substrate and lined with dielectric material. The lined trench is then filled with undoped polysilicon. A layer of dielectric material is then formed over an upper surface of the polysilicon filled lined trench and an opening is formed in the layer of second dielectric material to expose an upper surface of the undoped polysilicon. A layer of heavily doped polysilicon is then formed over the dielectric material and extending into the opening formed in the dielectric material such that the layer of doped polysilicon is in contact with an upper surface of the undoped polysilicon. A heat treatment step then causes dopant from the doped polysilicon to diffuse into the undoped polysilicon that fills the trench, thereby creating an ohmic contact between the doped polysilicon and the undoped polysilicon. A patterned layer of dielectric material is then formed over the doped polysilicon and an opening is formed in the dielectric material. A layer of conductive material is then formed over the dielectric material to extend into the opening to make electrical contact with the doped polysilicon.
In a preferred embodiment of the invention, these steps are carried out in the implementation of a bipolar process or a bi-CMOS process.